Job Details
Hiring for PSV Validation Engineer - Malaysia
Senior Engineer
Malaysia
2021-01-19 08:12:27
- Ability to define coverage and test plan according to the SOC design specification, requirements, and usage model – at subsystem and chip level.
- Experienced in developing / porting directed and random tests in C / C++ (hands-on) related to memories like DDR4 / LPDDR4.
- Well-versed in typical embedded sub-systems (processor - ARM etc., system fabrics, DSP functions, DDR/LPDDR memory, USB, communication interfaces such as I2C/SPI/UART/GPIO, power management).
- Experience in Hardware post Silicon (functional validation) on actual target boards, execution and debug.
- Hardware debug (FPGA and silicon) – experience in using lab equipment such as oscilloscope, logic analyser for post silicon validation.
- Knowledge of Python scripting experience is desired / preferred.
- Experience in working in any of the memory domains like DDR / LPDDR.
- Helping to manage first level debug of failing tests and work with design owners to resolve issues.
- Maintaining and enhancing the validation infrastructure by creating new tools to support validation.
- Working in a very team-oriented environment and interacting with engineers from other design disciplines.
- Uses CPU & system architecture knowledge, custom test tools, logic analyzers and internal debug.
- Techniques to root cause issues and test anomalies.
- Track and debug execution failures, root cause issues with boards and SW configurations.
- Provide effective communication in technical documentation, bug tracking, and data presentation.